AS6C1008-55SINT

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Main description SRAM Chip Async Single 3V 1M-bit 128K x 8 55ns 32-Pin SOP T/R
SRAM Chip Async Single 3V 1M-bit 128K x 8 55ns 32-Pin SOP T/R

Informacje podstawowe

  • ProducentAlliance Memory
  • EURoHSYes (2011/65/EU, 2015/863)
  • Automotive No

Informacje dodatkowe

  • Crosses 144
  • Inventory 3*
  • MaskPart AS6C100855SIN%
  • IntroductionDate May 17, 2006

Parametry

  • Address Bus Width (bit) 17
  • Architecture N/R
  • Data Rate Architecture N/R
  • Density (bit) 1M
  • Density in Bits (bit) 1048576
  • Function N/A
  • Maximum Access Time (ns) 55
  • Maximum Clock Rate (MHz) N/R
  • Maximum Operating Current (mA) 60
  • Maximum Operating Supply Voltage (V) 5.5
  • Maximum Operating Temperature (°C) 85
  • Minimum Operating Supply Voltage (V) 2.7
  • Minimum Operating Temperature (°C) -40
  • Number of Bits per Word (bit) 8
  • Number of I/O Lines (bit) 8
  • Number of Ports 1
  • Number of Words 128K
  • Supplier Temperature Grade Industrial
  • Timing Type Asynchronous
  • Typical Operating Supply Voltage (V) 3
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