CY7C341-30HMB
| Do pobrania | Download |
|---|---|
| Main description | CPLD MAX® Family 3.75K Gates 192 Macro Cells 0.8um Technology 5V 84-Pin Windowed LCC |
CPLD MAX® Family 3.75K Gates 192 Macro Cells 0.8um Technology 5V 84-Pin Windowed LCC
Informacje podstawowe
- ProducentCypress Semiconductor
- EURoHSNo (2011/65/EU)
- Automotive No
Informacje dodatkowe
- Crosses 5
- Inventory 1
- PCNs 25
- FoundINBOMs 3
- MaskPart CY7C34130HMB%
- IntroductionDate May 29, 1997
- EnablingEnergyEfficiency No
- SupplierUrl http://www.cypress.com/?app=search&searchType=part&keywords=CY7C341-30HMB
Parametry
- Clock Management N/A
- Copy Protection No
- Data Gate No
- Device Logic Cells N/A
- Device System Gates 3750
- Family Name MAX®
- I/O Voltage (V) N/A
- In-System Programmability No
- Individual Output Enable Control No
- Maximum Clock to Output Delay (ns) 16
- Maximum Internal Frequency (MHz) 50
- Maximum Propagation Delay Time (ns) 30
- Memory Size (Kbit) N/A
- Number of Flip Flops N/A
- Number of Global Clocks 1
- Number of I/O Banks N/A
- Number of Inter Dielectric Layers 2
- Number of Logic Blocks/Elements 12
- Number of Macro Cells 192
- Number of Product Terms per Macro 32
- Number of User I/Os 64
- Process Technology 0.8um
- Program Memory Type EPROM
- Programmability Yes
- RAM Bits (Kbit) N/A
- Reprogrammability Support No
- Speed Grade 30
- Supplier Temperature Grade Military
- Temperature Flag Case
- Tolerant Configuration Interface Voltage (V) N/A
- Tradename MAX