CY7C371iL-83JXIT
| Do pobrania | Download |
|---|---|
| Main description | CPLD FLASH370 Family 800 Gates 32 Macro Cells 83.3MHz 5V 44-Pin PLCC T/R |
CPLD FLASH370 Family 800 Gates 32 Macro Cells 83.3MHz 5V 44-Pin PLCC T/R
Informacje podstawowe
- ProducentCypress Semiconductor
- EURoHSYes (2011/65/EU, 2015/863)
- Automotive No
Informacje dodatkowe
- Crosses 388
- PCNs 24
- FoundINBOMs 1
- MaskPart CY7C371iL83JXI%
- IntroductionDate Apr 28, 1999
- EnablingEnergyEfficiency No
- SupplierUrl http://www.cypress.com/?app=search&searchType=part&keywords=CY7C371iL-83JXIT
Parametry
- Clock Management N/A
- Data Gate No
- Device Logic Cells N/A
- Device System Gates 800
- Family Name FLASH370
- I/O Voltage (V) 3.3|5
- In-System Programmability Yes
- Individual Output Enable Control No
- Maximum Clock to Output Delay (ns) 8
- Maximum Internal Frequency (MHz) N/A
- Maximum Propagation Delay Time (ns) 12
- Memory Size (Kbit) N/A
- Number of Flip Flops 44
- Number of Global Clocks 2
- Number of I/O Banks N/A
- Number of Inter Dielectric Layers N/A
- Number of Logic Blocks/Elements 2
- Number of Macro Cells 32
- Number of Product Terms per Macro 16
- Number of User I/Os 32
- Process Technology N/A
- Program Memory Type Flash
- Programmability Yes
- RAM Bits (Kbit) N/A
- Reprogrammability Support Yes
- Speed Grade 83
- Supplier Temperature Grade Industrial
- Temperature Flag Opr
- Tolerant Configuration Interface Voltage (V) N/A
- Tradename FLASH370