CY7C373-100JC
| Do pobrania | Download |
|---|---|
| Main description | CPLD FLASH370 Family 64 Macro Cells 84-Pin PLCC |
CPLD FLASH370 Family 64 Macro Cells 84-Pin PLCC
Informacje podstawowe
- ProducentCypress Semiconductor
- EURoHSNo (2011/65/EU, 2015/863)
- Automotive No
Informacje dodatkowe
- Crosses 109
- Inventory 1
- PCNs 25
- FoundINBOMs 3
- MaskPart CY7C373100JC%
- IntroductionDate Jun 02, 2000
- EnablingEnergyEfficiency No
- SupplierUrl http://www.cypress.com/?app=search&searchType=part&keywords=CY7C373-100JC
Parametry
- Clock Management N/A
- Copy Protection No
- Data Gate No
- Device Logic Cells N/A
- Device System Gates N/A
- Family Name FLASH370
- I/O Voltage (V) N/A
- In-System Programmability No
- Individual Output Enable Control No
- Maximum Clock to Output Delay (ns) 6.5
- Maximum Internal Frequency (MHz) N/A
- Maximum Propagation Delay Time (ns) 12
- Memory Size (Kbit) N/A
- Number of Flip Flops N/A
- Number of Global Clocks 4
- Number of I/O Banks N/A
- Number of Inter Dielectric Layers N/A
- Number of Logic Blocks/Elements 4
- Number of Macro Cells 64
- Number of Product Terms per Macro N/A
- Number of User I/Os 64
- Process Technology N/A
- Program Memory Type Flash
- Programmability Yes
- RAM Bits (Kbit) N/A
- Reprogrammability Support No
- Speed Grade 100
- Supplier Temperature Grade Commercial
- Temperature Flag N/A
- Tolerant Configuration Interface Voltage (V) N/A