XC2C128-7TQ144C
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|---|---|
| Main description | CPLD CoolRunner -II Family 3K Gates 128 Macro Cells 152MHz 0.18um Technology 1.8V 144-Pin TQFP |
CPLD CoolRunner -II Family 3K Gates 128 Macro Cells 152MHz 0.18um Technology 1.8V 144-Pin TQFP
Informacje podstawowe
- ProducentXilinx
- EURoHSNo (2011/65/EU, 2015/863)
- Automotive No
Informacje dodatkowe
- Crosses 363
- Inventory 2*
- PCNs 21
- GIDEP-Alerts 1
- MaskPart XC2C1287TQ144C%
- IntroductionDate Sep 26, 2001
Parametry
- Clock Management Doubler/Divider
- Copy Protection Yes
- Data Gate Yes
- Device Logic Cells N/A
- Device System Gates 3000
- Family Name CoolRunner -II
- I/O Voltage (V) 1.5|1.8|2.5|3.3
- In-System Programmability Yes
- Individual Output Enable Control No
- Maximum Clock to Output Delay (ns) 5.4
- Maximum Internal Frequency (MHz) 300
- Maximum Propagation Delay Time (ns) 7.5
- Maximum Storage Temperature (°C) 150
- Memory Size (Kbit) N/R
- Minimum Storage Temperature (°C) -65
- Number of Flip Flops N/A
- Number of Global Clocks 3
- Number of I/O Banks 2
- Number of Inter Dielectric Layers 4/5
- Number of Logic Blocks/Elements 8
- Number of Macro Cells 128
- Number of Product Terms per Macro 40
- Number of User I/Os 100
- Process Technology 0.18um
- Program Memory Type ROMLess
- Programmability Yes
- RAM Bits (Kbit) N/A
- Reprogrammability Support No
- Speed Grade 7
- Supplier Temperature Grade Commercial
- Temperature Flag Opr
- Tolerant Configuration Interface Voltage (V) 3.3
- Tradename CoolRunner