XC2S100-5FG256I
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| Main description | FPGA Spartan®-II Family 100K Gates 2700 Cells 263MHz 0.18um Technology 2.5V 256-Pin FBGA |
FPGA Spartan®-II Family 100K Gates 2700 Cells 263MHz 0.18um Technology 2.5V 256-Pin FBGA
Informacje podstawowe
- ProducentXilinx
- EURoHSNo (2011/65/EU, 2015/863)
- Automotive No
Informacje dodatkowe
- Crosses 551
- Inventory 1
- PCNs 21
- MaskPart XC2S1005FG256I%
- IntroductionDate Jan 05, 1999
Parametry
- Dedicated DSP N/A
- Device Logic Cells 2700
- Device Logic Gates 100000
- Device Logic Units 600
- Device Number of DLLs/PLLs 4
- Device System Gates 100000
- Digital Control Impedance No
- Ethernet MACs N/A
- Family Name Spartan®-II
- Giga Multiply Accumulates per Second N/A
- I/O Voltage (V) 1.2|1.5|1.8|2.5|3.3
- In-System Programmability No
- Maximum Differential I/O Pairs N/A
- Maximum Distributed RAM Bits 38400
- Maximum I/O Performance N/A
- Maximum Internal Frequency (MHz) 263
- Maximum Number of SERDES Channels N/A
- Maximum Number of User I/Os 176
- Maximum Power Dissipation (mW) N/A
- Maximum Propagation Delay Time (ns) N/A
- Mega Multiply Accumulates per second N/A
- Number of Global Clocks 4
- Number of I/O Banks 8
- Number of Inter Dielectric Layers N/A
- Number of Multipliers N/A
- Number of Registers N/A
- PCI Blocks N/A
- Process Technology 0.18um
- Processor Blocks N/A
- Program Memory Type SRAM
- Programmability Yes
- RAM Bits (Kbit) 37.5
- Reprogrammability Support Yes
- Shift Registers Utilize LUT
- Speed Grade 5
- Supplier Temperature Grade Industrial
- Temperature Flag Jun
- Tolerant Configuration Interface Voltage (V) 5
- Total Number of Block RAM 40
- Tradename Spartan
- Transceiver Blocks N/A
- Transceiver Speed (Gbps) N/A
- Typical Supply Current (mA) N/A